Multi-Process access capability: an arbitrary number of processes
(up to the maximum allowed by the kernel) is allowed to enter the driver
with the constraint, that one process must not possess two file
descriptors (fd) for the same crate.
Multi-Hardware installation: the driver allows an arbitrary number
of PCIADA/VMEMM combos in the configuration, you may have only up to 16
combos as the limit given by the VMEMM module number jumpers (or the
numbers of your available PCI slots). If two VMEMM VMEbus system
contollers have the same number, the second (in the sequence of PCIbus
numbering) will be rejected.
PnP: due to the PCIbus there aren't any parameter to set
externally for the driver, all driver parameters are retrieved from
the PCI bios.
Shared interrupts with ROAK and RORA support: the driver supports shared interrupts (so the
kernel version does), if there are many PCIADAs exhausting the available
interrupts, the PCI bios will give some PCIADAs the same irq line, for
which the driver is prepared.
VFS: the driver supports the usual Virtual File System functions
open, release, read, write, seek, ioctl and mmap.
The following addressing modes are supported
A16D32, A16D24 and A16D8
A24D32, A24D16 and A24D8
A32D32, A32D16 and A32D8
MMapped access: the mmapped access is realized via page fault
handling, which allows the user (process) to fetch a big window on the
VMEbus (say 1M), the driver will map the actual user page on the
hardware page every time the user accesses a new page. This process is
transperant to the user and very fast.
Mixing of MMap and Read/Write: there is no interaction between the mmapped and the read/write accesses.
Notification of system failures (interrupts) via SIGBUS:
the user will be notified in case of system errors (SYSFAIL, ACFAIL) or
VMEBUS timeout and error via the SIGBUS signal. If the user is prepared
(via signal()), the signal is catched, otherwise the process will terminate.
This mechanism ensures, that the user won't miss an important error
status of the system even in the case of mmapped access, otherwise resulting in difficult backtraces. The
information available for the signal are the timelabel (jiffies), the
reason (interrupt vector), the address of the last access (only correct
in case of VMEBUS_TO or VMEBUS_ERR), and the module number.