#include <userint.h>
#include "gui.h"
#include "pcivme_dll.h"
#include "CAENV965_DEF.h"
#include "CAENV462.h" 
#include "CAMAC.h"
#include "mdaq.h"




#include <errno.h>
#include <ctype.h>
#include <time.h>
#include <signal.h>
#include <utility.h>
#include "CAENV1290.h"

#define TDCV1290 1

/* VME modules */
#define CAEN_V462 0x333300  

#define CAEN_V965_0 0x340000
#define CAEN_V965_1 0x550000
unsigned long addr[2]={CAEN_V965_0, CAEN_V965_1};


#define NCH_ADC   16  
#define MAXCH_ADC 0x1000

/* Camac Modules*/
#define NTDC       12          /* TDC LeCroy 2277*/
#define NIO 23  
#define NDAC 20

#define LC2277_CSTOP_BOTHEDGE    0x7c00
#define LC2277_CSTOP_LEADINGEDGE 0x800
//#define CAEN_V965_PEDESTAL 250
#define CAEN_V965_PEDESTAL 180   // use it without the amplifier

int timer_out;

int init(int ped, int *mask , int gatetime){
  int i,module;
  unsigned short geo, fw, ah, al;
     
  unsigned short dum16;
  
  CREM_I(&dum16);
  // set output channels
  dum16=0x2;
  CSSA_W(NIO, 0, 9, &dum16);  
  CSSA_W(NIO, 0, 17, &dum16); // reset output 
  CSSA_W(NIO, 1, 17, &dum16); // veto  output
  dum16=0x3;
  CSSA_W(NIO, 2, 17, &dum16); // input 
  
  dum16=0x0;
  CSSA_W(NIO, 0, 16, &dum16);


  dum16=LC2277_CSTOP_BOTHEDGE;
  CSSA_W(NTDC, 0, 17, &dum16 ); 
  dum16=0;
  CSSA_R(NTDC, 0, 17, &dum16);
  
  printf("CAMAC n=%d LC2277_init SetRegister 0x%04x GetRegister 0x%04x\n", NTDC ,LC2277_CSTOP_BOTHEDGE,dum16); 

  #define CAEN_V1290A  0x330000
  V1290_init(0);
  V1290_map(0,CAEN_V1290A ,1);
  V462_map(0,CAEN_V462 ,1); 
  // 
  V462_set1(0,gatetime); 
  
  for ( module=0;module<2;module++){ 
    if (mask[module]){
    VME_A24D16_R(addr[module] + CAENV965_FW, &fw);
    geo = 0;
    VME_A24D16_W(addr[module] + CAENV965_CRN, &geo);
 
      
     // disable channels
    for (i=0;i<32;i++)
    if ((1<<i/2)&(~mask[module])) {
      geo=(1<<8); 
      VME_A24D16_W(addr[module] + CAENV965_THM + 2*i, &geo);
	  printf("Module %d Masking channel %d range %d\n", module, i/2, i%2);   
    } else {
      geo=0; 
      VME_A24D16_W(addr[module] + CAENV965_THM + 2*i, &geo);
      printf("Module %d Channel %d range %d enabled  mask=0x%04x \n", module, i/2, i%2, ~mask[module]);   
    }
  
      
    geo = module;
    VME_A24D16_W(addr[module] + CAENV965_GEO, &geo);
    VME_A24D16_R(addr[module] + CAENV965_GEO, &geo);
    VME_A24D16_R(addr[module] + CAENV965_ADH, &ah);
    VME_A24D16_R(addr[module] + CAENV965_ADL, &al);
  
    printf(" V965_map firmware = %d.%d\n", (fw>>8)&0xff, fw&0xff);
    printf(" V965_map geo      = %d\n", geo&0x1f );
    printf(" V965_map addr	 = 0x%04X0000\n", (ah<<8)|(al&0xff));
 	
    //----------------------------   
    dum16= 0x80;
    VME_A24D16_W(addr[module] + CAENV965_BS1, &dum16);
    VME_A24D16_W(addr[module] + CAENV965_BC1, &dum16);

    //dum16= CAEN_V965_PEDESTAL;
    dum16=ped;
    VME_A24D16_W(addr[module] + CAENV965_PED, &dum16);

    dum16= 0x5000;
    VME_A24D16_W(addr[module] + CAENV965_BS2, &dum16);

    dum16= 0x4;
    VME_A24D16_W(addr[module] + CAENV965_BS2, &dum16);
    VME_A24D16_W(addr[module] + CAENV965_BC2, &dum16);
    VME_A24D16_W(addr[module] + CAENV965_ECR, &dum16);
  }
  }    
      
      printf("daq::init()\n");
      return 0;
}

int daqconnect(){

// initialize VME interface
	PCIVME_load(NULL);
	PCIVME_open24 ();//WMEHandle = hHandle24	


    printf("daq::connect()\n");
    return 0;
}
  
int daqdisconnect(){ 
  /* end */
    unsigned short dum16=1;
    
    
    dum16=0x2;
    CSSA_W(NIO, 0, 16, &dum16);
    dum16=0x3;
    CSSA_W(NIO, 0, 16, &dum16);
    dum16=0x2;
    CSSA_W(NIO, 0, 16, &dum16);
    
  //close VME interface
	PCIVME_close24 ();
	PCIVME_unload ();
 
  printf("daq::disconnect()\n");
  return 0;
}

int clear(){
	unsigned short dum;
	CSSA_R(NTDC, 0, 9, &dum);//Clear
    CSSA_R(NTDC, 0, 10, &dum);//Clear LAM
	CSSA_W(NTDC, 0, 26, &dum);//Enable LAM  
	V1290_clear(0);

	dum= 0x4;
      VME_A24D16_W(CAEN_V965_0  + CAENV965_BS2, &dum);
      VME_A24D16_W(CAEN_V965_1  + CAENV965_BS2, &dum);
      VME_A24D16_W(CAEN_V965_0  + CAENV965_BC2, &dum);
      VME_A24D16_W(CAEN_V965_1  + CAENV965_BC2, &dum);
//    Delay(0.01);  
	//trigger next measurements
	dum=0x1;
	CSSA_W(NIO, 0, 16, &dum);
	//Delay(0.1);
	dum=0x0;
	CSSA_W(NIO, 0, 16, &dum);

   return 0;
}

int module_header(int recid,unsigned long *data,int len){
   data[0] = recid;
   data[1] = (len >0)? len : 0 ;
   return data[1]+2;
}


#define MAXITER 100000
int event(int flag ,unsigned long *data, int maxn, int *ctr,int *mask){
   int edge, rg, val, ch;
   int ndata, module;
   int count=0;
   unsigned int dum,q,idx;
   unsigned long dum32,ierr;
   unsigned short *tdc16 = (unsigned short *) &dum32;  
   clear();    
   // wait for trigger on IOreg
  
   idx=0;
   do {
     dum = 0x0;
     CSSA_R(NIO, 0, 0, &dum);//LAM
     q = dum & (0x1<<2);
     idx++;
     
   } while ((!q) && (!timer_out) && (idx<MAXITER))  ;
   if (idx==MAXITER)
     return -2;
   
   
  if (flag&0x2){
#ifdef TDCV1290   
   idx=0;
   while ((!(V1290_status(0)&0x1))&& idx++<MAXITER);
   if (idx==MAXITER) return -3; 
  
   idx = V1290_read (0, &data[count+2],maxn-count-2);
   
   if (count+2<maxn) count+=module_header(CAEN_V1290A ,&data[count],idx);     
  
#endif
  }

   // LC 2277
   /*
   do {
     dum=0x0; CSSA_R(NTDC, 0, 8, &dum);//LAM
     q=(dum >> 15) & 0x1;
     idx++;
   } while (!q && !timer_out&& idx<MAXITER)  ;//LAM = first bit of 16
   if (idx==MAXITER) return -1;
   
   ndata=0;
   do {
	CFSA_R(NTDC,0,0,&dum); //read first word of data word
	tdc16[1] = dum;	
	CSSA_R(NTDC,0,0,&dum); //read second word of data word
	tdc16[0] = dum;
					
	//read CAMAC status
	CSR(&dum);
	q=(dum >> 15) & 0x1;
	if( !q ) break;
	  val =   dum32&0xFFFF;		       
      ch  =  (dum32  >> 17 ) &0x1F;               	  	
      edge = (dum32  >> 16 ) &0x1;
  	  //printf("LC %d [%d] %d %d\n",ndata,ch, edge, val);

      idx=count+2+ndata; 
      if (idx<maxn) data[idx] = dum32;
      else return -2;
      ndata++;
  } while (1);
  count+=module_header(NTDC,&data[count],ndata);
   */
  // CAEN V965
   if (flag & 0x1){
   for ( module=0;module<2;module++){
   if (mask[module]){
     idx=0;
     do {
        VME_A24D16_R(addr[module] + CAENV965_SR1, &dum);
        idx++; 
     } while (!(dum&0x1) && idx<MAXITER);
	 if (idx==MAXITER) return -3-module;
     ndata=0;
     do {
      idx=count+2+ndata; 
      if (idx<maxn) VME_A24D32_R( addr[module] + CAENV965_OB, &data[idx]);  
      else return -5-module;
       
       ierr=(data[count+2+ndata]>>25)&0x3;

	   if (ierr==0) {
		     	    ch=(data[count+2+ndata]>>17)&0xf;
		     	    rg=(data[count+2+ndata]>>16)&0x1;
		     	    val=data[count+2+ndata]&0xfff;
		     	    //printf("V965 %d [%d] rg=%d %d\n",ndata,ch, rg, val);
	   }
	   if (ierr<3) ndata++;
	   
     } while (ierr<2);
     
     count+=module_header(addr[module],&data[count],ndata);
  }
  }
  
  }
  
   return count*sizeof(unsigned long);
}

int end(){
  
  return 0;
}


int SetDac(int dac){

  	CSSA_W(NDAC, 0,16, &dac);//Set DAC Voltage
return 0;
}