Low mass tapes for ATLAS SCT
detector (Ljubljana ATLAS
group)
Low mass tapes are flexible circuits used to bring
power and some control signals to the silicon modules. From the he
module - opto flex circuit to the patch panel (PP1) 50 microns thick Al
is used as a conductor due to the requirement to have minimum scattering
in the SCT detector. Aluminium was chosen as a conductor in the first section
since it has 4 times better conductivity than copper at the same scattering
length (see the material
estimate ). Al tapes with 100 microns thick Al were considered
in PP1 - PP2 region, however now thin conventional
cables are a baseline. Low mass cables will
supply modules with necessary voltages for chip and detector operation,
as well as with some control
levels. It is foreseen to have one low mass cable per module.
Cables will be custom made by photolithography of aluminium on the
kapton substrate. They are made at ELGO
LINE on 30 cm wide tape process and their design should allow large
surface yield.
Specifications
of LM cables
DATABASE
of low mass tapes
LM links
Pictures
Tests
PP1B-V6Z
PP1B-V6Z is multilayer board (with 8 layers of conductors) accepting
low mass tapes
from the barrel harness (6 tapes) and conventional cables from the
power supply side.
It provides filtering of noise with same electrical layout as PP1V5.3.
Top and bottom
layer (plane) conductors are connected to the shield.
Soldering
of tapes and connecting cables to the PP1B-V6Z a version without
MOLEX
connector - a baseline version (4 March
02)
PCB
layout (updated 26.03.2002)
PCB
schematic
Component
placement on PCB
Dimensional
picture of PP1B-V6Z with its dimensions and positions of soldering
pads (updated 09.04.2002)
Connector
for conventional cable - specifications
Capacitors
Alternative
designs (a history)
DESIGN V5:
SCT Barrel:
low
mass tape layout
PP1V5.3
electrical layout
PP1V5.3
N and W PCB design
design
of electrical layers of PP1V5.3 N and W PCB
Pin
layout on Molex 240 pin connector
pad
layout for soldering of tapes to PP1N
cabling
and soldering of tapes to PP1N and interface PCB
Molex
240 pin connector data (PS file)
harness
lengths
Voltage limiter:
simulation
of limiter actions at different limiter positions
measurements
of limiter action with module
DESIGN for 2001 system test:
cabling
with module 0 harness
barrel
low mass tape design 2001 and forward
low mass tape design 2001
New: next iteration of patch panels for 2001 system test (new mounting
holes, changed filtering)
PP1N_V4
and PP1W_V4 schematic
PP1N_V4
and PP1W_V4 PCB layout
PP1N_V4
and PP1W_V4 pin layout
PP1N_V3
and PP1W_V3a schematic (accepts low mass tapes on module side
and conventional cable on PP2 side)
PP1W_V3a
PCB layout
PP0F
PCB layout and its schematic
for three modules with K4 hybrids
PP2
_V3 with voltage limiters , connectors for conventional cables
and its time
response
PP2_V3
with voltage limiters PCB for 6 modules
DESIGN for the 2000 system
test:
May 1999 version of low mass tape was not in agreement
with IPC -2223
standard which requires 2.5 mm spacing for 500V bias voltage. Also
few lines have been changed. Therefore the design
2000 of low mass cable for system test June 2000 is used.
Here you may find:
-
low mass tape design
2000
-
a schematic
view of system test -2 and system test june 2000 barrel low mass tape
and patch panel layout can be seen (PDF 21 kb)
-
a schematic
view of barrel and forward low mass tape and patch panel layout
for the system test 2000
-
Pin layout for soldering of thin low mass tapes on barrel
patch panel
PP-1-N-V3 and PP-1-W-V3 as well as definition of MOLEX 240 pin connector
(PDF)
-
scheme
of PP-1-V3 (capacitors, switches...)
-
PCB layout of PP1-N-V3
and PP1-W-V3
- view from above as defined in a
schematic view of system test cables
-
PCB layout of final
version of PP1 (obsolete)
-
PP2
PCB for system test June 2000 and its schematic
-
PP0F
for system test 2000 and its schematic
DESIGN for 1999 system test:
VERSION
OF LOW MASS TAPES AND CONNECTORS
for SCT:
Version of cables (May 1999) is taking into account increased
current - 1A of digital and analogue current needed to drive electronics
of one SCT module (previous version assumed 1A of analogue and 0.3A of
digital current). The design is available in PS
or PDF format.
-
PP0F
for system test -2
-
PP2 PCB
and its schematic
Voltage drops per meter of cable (both directions taken into account!):
Power loss per meter of cable:
250 mW/m analogue (50 micron Al)
250 mW/m digital (50 micron Al)
125 mW/m analogue (100 micronAl)
125 mW/m digital (100 micron Al)
Patch panels: There are two patch panels for low mass tapes.
Proposal (June 1999) is to solder six low mass tapes to a printed circuit
board. PP2 makes a transition to conventional cable.
DESIGN for 1998 system test
Cables, Connectors and Patch Panels for the system
test September 1998
Design of the low
mass tape for the first modules in system test together with definition
of lines is available in PS format. There is one zero insertion force connector
per each layer of the cable in the system test. MOLEX
FFC zero insertion force 52207 connectors with 17 pins are used.
PP2 makes a transition from low mass to conventional cable. In the system
test it has a connector for low mass tape (like MOLEX ZIF 52207) and a
connector for conventional cable. Patch
panel with voltage
limiter used in system
test uses CANNON, DBC-25 as a temporary solution.
For more information and comments contact Vladimir
Cindro .
Last modified 26. March 2002